An inverter, a DC-DC converter or the like is used as a power conversion apparatus for a DC power source, which uses switching elements such as power MOSFETs.
One exemplary power conversion apparatus is shown and indicated by a reference numeral 90 in FIG. 14A. The power conversion apparatus 90 includes a half-bridge circuit, which forms a basic part of one phase of an inverter circuit. The half-bride circuit includes a high-side switching element SW1 and a low-side switching element SW2. By operating the switching elements SW1 and SW2 complementarily, a DC voltage E1 is converted into an AC voltage to supply electric power to an inductive load LD.
As the switching elements SW1 and SW2, a power MOSFET (metal oxide semiconductor field effect transistor), an IGBT (insulated gate bipolar transistor), a SJ-MOSFET (super junction MOSFET) or the like may be used. The switching elements SW1 and SW2 have parasitic diodes D1 and D2, which are body diodes, respectively. When the inductive load LD is driven, the parasitic diodes D1 and D2 function as freewheeling diodes. However the parasitic diodes D1 and D2 generally have poor reverse recovery characteristics. As a result, a large reverse recovery current flowing in reverse in the diode at time of reverse recovery is generated, and a surge voltage and resonance, which is referred to as ringing, are induced.
The power conversion apparatus 90 operates as shown in FIG. 14B, in which rise characteristics of a current IS1 and a voltage V2 developed when the switching element SW1 is turned on are shown in an enlarged manner. In the inverter circuit, to prevent the switching elements SW1 and SW2 from turning on at the same time and causing a short circuit of the power source, a period of about a few microseconds (μs) is provided normally as a dead time period (ΔTd) as shown in FIG. 14B. When the switching element SW1 is turned on under a condition that the freewheeling current is flowing during the dead time period ΔTd in the forward direction from the inductive load LD to the parasitic diode D2, a load current is switched to a current IS1, which flows to the switching element SW1. In this instance, a voltage in the reverse direction is applied to the parasitic diode D2. As a result, as shown by waveforms of the current IS1 and the voltage V2 in FIG. 14B, a large reverse recovery current is superposed and a current surge and a voltage surge are generated. Even after minority carriers in the parasitic diode D2 disappeared and the parasitic diode D2 is turned off, a ringing (continuing resonance) is generated due to a parasitic inductance and a parasitic resistance of conductive wires and capacitances of the switching element SW1 and the parasitic diode D1.
One example of an apparatus, which solves the above-described drawbacks of the reverse recovery current, is disclosed in the following patent document 1 as a switching power source apparatus, which includes a main oscillation element TR1 and a synchronous rectification element.
Patent document 1: JP 2009-273230A (US 2011/0018512)
The patent document 1 discloses a switching power source apparatus 20 shown in 15A and 15B, which show operation states in periods TD and TE shown in FIG. 15C. This apparatus 20 is configured to suppress a recovery current.
The switching power supply apparatus 20 converts an input voltage into a desired DC voltage to supply the load LD with electric power. It includes a main oscillation element TR1 connected in series with an input power source E, a synchronous rectification element SR1 turned on and off complementarily and a parasitic diode DSR1, which is connected to both ends of the synchronous rectification element SR1 in a direction to supply a current to a smoothing circuit 16 formed of series-connected inductor Lo and capacitor Co. At both ends of the parasitic diode DSR1, a rectification assist circuit 22 is provided. The rectification assist circuit 22 is formed of a series circuit of an auxiliary switching element Q1 and an auxiliary capacitor C1, which is driven by a control circuit (not shown). The main oscillation element TR1, the synchronous rectification element SR1 and the auxiliary switching element Q1 are controlled by controls pulses Vga, Vgb and Vgc shown in FIG. 15C. The signal levels of the control pulses Vga, Vgb and Vgc, and hence the on/off states of the elements TR1, SR1 and Q1 are controlled to change in each cycle period, which is formed of periods TA, TB, TC, TD and TE indicated in FIG. 15C.
In the switching power supply apparatus 20, the main oscillation element TR1 is turned off by the control pulse Vga and the synchronous rectification element SR1 is turned on by the control pulse Vgb in the period TD as shown in FIG. 15A. The auxiliary switching element Q1 remains turned off by the control pulse Vgc. When the main oscillation element TR1 is turned off from the on-state, the inductor Lo generates a counter-electromotive force. As shown by a dotted-line arrow in FIG. 15A, a current thus flows in a path, which is formed of the capacitor Co, the load LD and the synchronous rectification element SR1. Thus, electromagnetic energy charged in the inductor Lo during the on-state of the main oscillation element TR1 is discharged. Since the on-resistance of the synchronous rectification element SR1 is small, no forward current flows in the parasitic diode DSR1 in the forward direction. This forward direction is for charging the reverse recovery charge, which causes the reverse recovery current.
At the time of change from the period TD to the period TE in the timing chart of FIG. 15C, the synchronous rectification element SR1 is also turned off from the on-state and enters the dead time period state while the main oscillation element TR1 remains turned off. In response to a timing of turning off of the synchronous rectification element SR1, the auxiliary switching element Q1 is turned on at the same time as shown or after a slight delay, which may not be recognizable in the figure. This slight delay is provided so that the timing, at which the auxiliary switching element Q1 is substantially turned on after the synchronous rectification element SR1 has been substantially turned off, is not reversed. The slight delay is determined as a function of operation speed of the synchronous rectification element SR1 and the auxiliary switching element Q1 as well as a parasitic inductance and a parasitic capacitance of wiring patterns on a circuit substrate (not shown). This slight delay is regulated to be in the range from zero (0) to the dead time period ΔTd.
In the operation in the period TE, as shown in FIG. 15B, the current flows through the auxiliary switching element Q1. The auxiliary capacitor C1 is charged to a voltage, which is generally equal to the power source voltage, discharges and supplies a current in a different path indicated by the dotted-line arrow in FIG. 15B. The current passes through the auxiliary switching element Q1, the inductor Lo, the capacitor Co and the load LD. The auxiliary capacitor C1 has a capacitance of more than a predetermined value. Therefore, even when a part of electric charge is discharged by the above-described discharging, the voltage between its both ends is maintained to be higher than a predetermined voltage. The auxiliary capacitor C1 thus continues its discharge operation, and the forward current, which causes the reverse recovery current does not flow in the parasitic diode DSR1.
In the switching power supply apparatus 20, a route, in which the discharge current of the charged capacitor Co flows to the load LD, is formed at the earliest possible time during the dead time period so that no load current is allowed to flow in the parasitic diode DSR1. By thus preventing the charged carriers from remaining in the parasitic diode DSR1 when the synchronous rectification element SR1 remains turned off, the reverse recovery current is prevented from flowing when the main oscillation element TR1 is turned on.
In the switching power supply apparatus 20, the forward current, which causes the reverse recovery current, is prevented from flowing to the parasitic diode DSR1 in the operation in the period TE. As a result, the current surge and the voltage surge caused by the large reverse recovery current described with reference to FIG. 14B can be suppressed.
In the switching power supply apparatus 20, the current is continuously supplied to the path indicated by the dotted-line arrow in the operation in the period TE during the dead time period as shown in FIG. 15B. Accordingly the auxiliary capacitor C1 need to have a large capacitance and hence a large loss arises in the auxiliary capacitor C1. Particularly, in the switching power supply apparatus, in which a time constant switching circuit of a resistor and a diode is provided in a rectification assist circuit to mitigate a current stress applied to the main oscillation element TR1 and the like, loss is caused by resistors of the time constant switching circuit during the dead time period.
Patent document 1 further discloses to provide a slight delay so that the auxiliary switching element Q1 is protected from shorting, which is caused by reversal of the timing of turning off of the synchronous rectification element SR1 and the timing of turning on of the auxiliary switching element Q1. However, an optimum value of such a slight delay depends on values of the parasitic inductance and the parasitic capacitance. It is difficult to optimally control to turn on the auxiliary switching element Q1 in response to the timing of turning off of the synchronous rectification element SR1 as performed in the switching power supply apparatus 20. It is also not preferred from the standpoint of safety.